EP1SGX40GF800I7 vs EP1SGX40GF800C5N 对比
详细并排对比 EP1SGX40GF800I7 出自 Altera 和 EP1SGX40GF800C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1SGX40GF800I7 | EP1SGX40GF800C5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,325.00 | $198.75 |
| Family | Stratix GX | Stratix GX |
| Series | Stratix GX FPGA | — |
| Logic Elements (LE) | 41,250 | — |
| Embedded Memory | 3,423,744 bits | — |
| Embedded Multipliers (18x18) | 624 | — |
| High-Speed Transceivers (SERDES) | 20 channels, up to 3.125 Gbps | — |
| 封装 | 800-ball FineLine BGA (GF) | 780-pin FineLine BGA |
| 工作温度 | -40C to +100C (industrial, I grade) | Commercial (0C to +85C) |
| Speed Grade | -7 | -5 (slower than -6/-7) |
| PLL Count | 12 (logic + transceiver) | — |
| User I/O Banks | [DATA_NEEDED: number of user I/O banks and pins] | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| Supply Voltage Core | [DATA_NEEDED: VCCINT nominal] | — |
| Configuration Method | Enhanced configuration device / Passive serial / JTAG | EPC enhanced configuration devices or JTAG |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: explicit RoHS statement for this specific MPN] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free finish] |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| Transceiver Protocols Supported | PCI Express, Gigabit Ethernet, XAUI, Serial RapidIO, Fibre Channel | — |
| Logic Elements | — | 41,250 |
| Total RAM Bits | — | 3,432,192 (3.4 Mbit) |
| DSP Blocks | — | 14 |
| Embedded Multipliers (9-bit equivalent) | — | 56 |
| Transceiver Channels | — | 20 (up to 3.1875 Gbps per channel) |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count for 780-pin BGA] |
| PLLs | — | 24 |
| Clock Networks | — | 8 phase-locked |
| Core Voltage | — | 1.5 V |
| Process Technology | — | 0.13 µm SRAM |