EP20K1000EBC652-2X vs EP20K1500EBC652-1X 对比

详细并排对比 EP20K1000EBC652-2X 出自 Altera 和 EP20K1500EBC652-1X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。

Altera

EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)

EP20K1000EBC652-2X Nrnd

Altera

EP20K1500EBC652-1X Obsolete

参数	EP20K1000EBC652-2X	EP20K1500EBC652-1X
品牌	Altera	Altera
分类	FPGA & CPLD	FPGA & CPLD
生命周期状态	不推荐新设计	Obsolete
库存状态	有库存	有库存
单价（USD）	$99.00	$175.00
Family	APEX-20KE	APEX 20KE
Device Logic Elements	38,400	—
Typical Gates	1,000,000 system gates	—
Embedded Memory Bits	327,680 bits	—
User I/O Pins	488	—
Maximum User I/O	488	—
Propagation Delay	1.6 ns	1.84 ns
Internal Maximum Frequency	350 MHz	—
Logic Blocks / Macros	2,560 macros	—
PLLs	4	—
Core Voltage	1.8 V	1.8 V
Process Technology	0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS	0.22 µm CMOS
封装	652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch)	652-ball BGA (FCBGA / PBGA652)
安装类型	Surface Mount	Surface Mount
工作温度	0 °C to +85 °C (commercial)	0 °C to +85 °C (commercial)
Configuration Interface	JTAG (IEEE 1149.1), Passive Serial, Altera configuration	—
RoHS 状态	Compliant	[DATA_NEEDED: RoHS compliance]
Logic Elements / Cells	—	51840
System Gates	—	1.5 M
Macros	—	3456
Total RAM Bits	—	442368
User I/O	—	488
Number of I/O Banks	—	[DATA_NEEDED: I/O bank count]
Internal Frequency	—	160 MHz (per digchip) / 400 MHz (per fpgakey)
MSL 等级	—	[DATA_NEEDED: MSL rating]
Configuration Method	—	JTAG / SRAM
Architecture	—	MultiCore (LUT + product-term)