EP20K100CF144C9 vs EP20K100CF144C7 对比

详细并排对比 EP20K100CF144C9 出自 Intel 和 EP20K100CF144C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100CF144C9 EP20K100CF144C7
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $49.00 $28.40
Family APEX-20K APEX-20K Field Programmable Gate Array
Device Logic Elements 4,160 —
Typical Gates 100,000 —
Embedded System Blocks (ESBs) 4 —
Maximum User I/O Pins 93 —
Embedded RAM Bits 53,248 —
封装 144-LQFP —
Pin Pitch 0.5 mm [DATA_NEEDED: confirm pitch, datasheet quotes 0.5 mm for LQFP-144] —
Configuration Method SRAM / JTAG (IEEE 1149.1) —
Core Voltage 2.5 V —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+ [DATA_NEEDED: full list per datasheet I/O chapter] —
Speed Grade C9 (commercial) C7 (commercial)
Operating Temperature (Commercial) 0C to +85C —
安装类型 Surface Mount Surface Mount
Lead-Free / RoHS [DATA_NEEDED: not stated in distributor snippets] —
Series — APEX-20K
Logic Elements / Cells — 4,160
Total RAM Bits — 53,248
Number of Logic Elements — 4,160
Number of I/O — 93
Number of Gates — 100,000 system gates
Voltage - Supply — 1.8 V core, 3.3 V I/O (typical APEX-20K rails)
封装 / 外壳 — 144-LQFP
Package Dimensions — 22 x 22 mm, 0.5 mm pitch
工作温度 — 0C to +85C (commercial)
Process Technology — 0.18 micron CMOS SRAM
Configuration Mode — Passive Serial, JTAG (IEEE 1149.1)
PLLs — 4 (per APEX-20K family architecture)
RoHS 状态 — [DATA_NEEDED: RoHS status]

数据手册与资源

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