EP20K100EFC324-2X vs EP20K100EFC324-1N 对比
详细并排对比 EP20K100EFC324-2X 出自 Intel 和 EP20K100EFC324-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K100EFC324-2X | EP20K100EFC324-1N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $99.50 | $108.00 |
| Family | APEX 20KE | APEX-20KE |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | FPGA (Field Programmable Gate Array) |
| System Gates | 100,000 gates | — |
| Logic Elements / Cells | 4,160 | — |
| Total RAM Bits | 53,248 bits | — |
| LABs / CLBs | 416 | — |
| Maximum User I/Os | 246 | — |
| Number of I/O Banks | 8 (per APEX 20KE family) | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | Up to 250 MHz | 250 MHz |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | MultiVolt: 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.22 µm CMOS (all-layer copper metal) | 0.15 µm all-layer copper CMOS |
| Speed Grade | -2X | — |
| 封装 | 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch | 324-BGA (FineLine BGA) |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0 °C to 85 °C (Commercial) | 0 C to 85 C |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM | — |
| RoHS 状态 | [DATA_NEEDED: confirm against lot-specific documentation] | — |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |