EP20K100FC324-1V vs EP20K100EFC324-1N 对比

详细并排对比 EP20K100FC324-1V 出自 Intel 和 EP20K100EFC324-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100FC324-1V EP20K100EFC324-1N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $118.40 $108.00
Series APEX-20K® —
Number of Logic Elements / Cells 4160 —
Total RAM Bits 53248 —
Number of Gates (typical) 100000 —
Number of I/O 252 —
Number of LABs/CLBs [DATA_NEEDED: number of Logic Array Blocks] —
Number of EABs [DATA_NEEDED: number of Embedded Array Blocks] —
Supply Voltage - Core (VCCINT) 2.375 V to 2.625 V —
Supply Voltage - I/O (VCCIO) 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) —
Speed Grade -1V (commercial) —
工作温度 0C to +85C (commercial) 0 C to 85 C
安装类型 Surface Mount —
封装 / 外壳 324-FBGA (FineLine BGA, 19x19 mm) —
Supplier Device Package 324-FBGA —
Number of PLLs 4 —
I/O Standards Supported LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL —
Architecture MultiCore (LUT + product-term + embedded memory) —
Programming Interface JTAG (IEEE 1149.1) / in-system —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
Family — APEX-20KE
Device Type — FPGA (Field Programmable Gate Array)
Logic Elements (LEs) — 4160
Typical Gates — 100,000
Maximum User I/O — 246
Embedded System Blocks (ESBs) — 53248 bits
封装 — 324-BGA (FineLine BGA)
Propagation Delay — 1.6 ns
Internal Operating Frequency — 250 MHz
Core Voltage — 1.8 V
I/O Standard Support — LVDS, SSTL, HSTL, LVTTL, LVCMOS
Process Technology — 0.15 µm all-layer copper CMOS
JTAG Support — IEEE 1149.1 boundary-scan
Programming Technology — SRAM-based (volatile, requires configuration device)
MultiVolt I/O — 1.8 V core with 3.3 V / 5.0 V I/O support

数据手册与资源

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