EP20K100FC324-2 vs EP20K100EFC324-1N 对比

详细并排对比 EP20K100FC324-2 出自 Intel 和 EP20K100EFC324-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP20K100FC324-2 EP20K100FC324-2 - APEX 20K 100K Gates FPGA | Intel / Altera

EP20K100FC324-2 - APEX 20K 100K Gates FPGA | Intel / Altera

EP20K100FC324-2 ⚠ 最后一次采购

规格对比

参数 EP20K100FC324-2 EP20K100EFC324-1N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $18.90 $108.00
Device Family APEX 20K —
Equivalent Gates 100,000 —
Logic Cells 4,160 —
Maximum User I/Os 252 —
封装 324-ball FBGA 324-BGA (FineLine BGA)
引脚数量 324 —
Technology Node 0.22 µm CMOS —
Core Supply Voltage 2.5 V —
Propagation Delay (tPD) 1.6 ns —
Internal Performance 200 MHz —
工作温度 0°C to 85°C 0 C to 85 C
Configuration Method JTAG / serial configuration PROM —
Embedded Memory Dual-port RAM blocks (ESB) —
RoHS 状态 [DATA_NEEDED: RoHS compliance] —
Programming Toolchain Altera Quartus / MAX+PLUS II —
Family — APEX-20KE
Device Type — FPGA (Field Programmable Gate Array)
Logic Elements (LEs) — 4160
Typical Gates — 100,000
Maximum User I/O — 246
Embedded System Blocks (ESBs) — 53248 bits
Propagation Delay — 1.6 ns
Internal Operating Frequency — 250 MHz
Core Voltage — 1.8 V
I/O Standard Support — LVDS, SSTL, HSTL, LVTTL, LVCMOS
Process Technology — 0.15 µm all-layer copper CMOS
JTAG Support — IEEE 1149.1 boundary-scan
Programming Technology — SRAM-based (volatile, requires configuration device)
MultiVolt I/O — 1.8 V core with 3.3 V / 5.0 V I/O support

数据手册与资源

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