EP20K100FC324-2 vs EP20K100EFC324-1N Comparaison
Comparaison détaillée côte à côte de EP20K100FC324-2 par Intel et EP20K100EFC324-1N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100FC324-2 | EP20K100EFC324-1N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,90 | $108,00 |
| Device Family | APEX 20K | — |
| Equivalent Gates | 100,000 | — |
| Logic Cells | 4,160 | — |
| Maximum User I/Os | 252 | — |
| Boîtier | 324-ball FBGA | 324-BGA (FineLine BGA) |
| Nombre de broches | 324 | — |
| Technology Node | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay (tPD) | 1.6 ns | — |
| Internal Performance | 200 MHz | — |
| Température de fonctionnement | 0°C to 85°C | 0 C to 85 C |
| Configuration Method | JTAG / serial configuration PROM | — |
| Embedded Memory | Dual-port RAM blocks (ESB) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Programming Toolchain | Altera Quartus / MAX+PLUS II | — |
| Family | — | APEX-20KE |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| Process Technology | — | 0.15 µm all-layer copper CMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |