EP20K100QC240-1XV vs EP20K100QC240-3N 对比

详细并排对比 EP20K100QC240-1XV 出自 Intel 和 EP20K100QC240-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100QC240-1XV EP20K100QC240-3N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $52.10 $0.00
Series APEX 20K —
Device Family APEX 20K (MultiCore architecture) —
System Gates 100,000 gates —
Logic Elements (Cells) 4,160 —
Embedded Memory 53,248 bits —
User I/Os 189 —
Dedicated Inputs 4 —
PLLs 4 —
Core Supply Voltage (VCCINT) 2.5 V nominal (2.375 V to 2.625 V) —
I/O Supply Voltage (VCCIO) 3.3 V / 5 V tolerant —
Propagation Delay (tpd) 2.5 ns —
Maximum Internal Frequency 250 MHz —
Process Technology 0.22 um CMOS —
封装 240-pin PQFP (32 x 32 mm, 0.5 mm pitch) 240-BFQFP
安装类型 Surface Mount (gull-wing leads) Surface Mount
工作温度 0C to +85C (commercial) / -40C to +85C (industrial variant) 0 C to 85 C
Configuration Interface JTAG / serial (EPC configuration device) —
RoHS 状态 Non-compliant (legacy PQFP, non-LEAD-FREE process) unknown
生命周期状态 Obsolete / last-time-buy per Altera PCN —
Device Type — FPGA
Family — APEX-20K
Gate Count — 100000 gates
Logic Cells — 4160 cells
User I/O — 189 I/O
Distributed Memory — 53248 bits
Macrocells — 416 macrocells
电源电压 — 2.375 V to 2.625 V
Nominal Supply — 2.5 V
Maximum Frequency — 167 MHz
引脚数量 — 240 pins
Fabrication Process — 0.15 um all-layer copper-metal process
Package Pitch — 1.27 mm
Package Dimensions — 45 mm x 45 mm
AEC-Q100 — not_qualified

数据手册与资源

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