EP20K100QC240-3V vs EP20K100QC240-3 对比

详细并排对比 EP20K100QC240-3V 出自 Intel 和 EP20K100QC240-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K100QC240-3 EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 - 189 I/O APEX-20K FPGA | Altera

EP20K100QC240-3 ✓ 量产中

规格对比

参数 EP20K100QC240-3V EP20K100QC240-3
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $87.20 $24.50
Series APEX-20KE —
Family APEX-20K —
Logic Logic Elements / Cells 4,160 —
Total System Gates 100,000 —
Total RAM Bits 53,248 53248 bits
Number of User I/O 189 189
Number of Logic Blocks 53248 (LABs) —
Core Voltage 2.375 V to 2.625 V —
工作温度 0C to +85C (Commercial) —
Maximum Frequency 167 MHz —
Process Technology 0.22 µm CMOS —
安装类型 Surface Mount Surface Mount
封装 240-BFQFP (32 x 32 mm) —
Speed Grade -3 (fastest APEX 20KE grade) -3
Lead-Free / RoHS Yes (-3V suffix) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Manufacturer — Altera
FPGA Family — APEX-20K
Number of Logic Elements — 4160 cells
Typical Gate Count — 263000 gates
Core Supply Voltage — 2.5 V
最大时钟频率 — 167 MHz (family rating)
Technology Process — 0.22 um
Package Type — 240-BFQFP
引脚数 — 240
工作温度范围 — 0 °C to +85 °C (commercial)
Propagation Delay — [DATA_NEEDED: propagation delay timing table]
Supported I/O Standards — [DATA_NEEDED: supported I/O standards]
Configuration / JTAG Interface — [DATA_NEEDED: configuration and JTAG interface details]
RoHS Compliance — [DATA_NEEDED: RoHS compliance for non-N version]

数据手册与资源

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