EP20K200CF484C9N vs EP20K200CF484I9 对比

详细并排对比 EP20K200CF484C9N 出自 Altera 和 EP20K200CF484I9 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200CF484C9N EP20K200CF484I9
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $201.04 $138.00
Family APEX 20KC APEX 20KC (APEX 20K with ESB/CAM)
Device Type FPGA (Field-Programmable Gate Array) —
Typical Gates 200,000 200,000
Logic Elements 8,320 —
Embedded System Block (ESB) Bits 106,496 —
Maximum User I/O 376 376
最大时钟频率 250 MHz —
Process Technology 0.15 um CMOS 0.15 um CMOS
Core Supply Voltage (VCCINT) 1.8 V 1.8 V nominal (1.71 V to 1.89 V)
I/O Supply Voltage (VCCIO) 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) —
封装 484-pin FineLine BGA (FBGA) 484-ball FineLine BGA (FBGA), 1.00 mm pitch
Speed Grade C9 (250 MHz) -9 (lowest speed in EP20K200 family)
Temperature Grade Industrial (0C to +85C) —
安装类型 Surface Mount (BGA) —
Configuration Scheme SRAM-based, supports passive serial/parallel and JTAG —
MSL 等级 3 (per JEDEC J-STD-020) —
RoHS 状态 Compliant unknown - confirm with supplier (legacy part)
Series — APEX 20KC
Logic Elements (Cells) — 8,320
Dedicated Inputs — 4
Total Terminals — 484 (balls)
Operating Temperature Grade — Industrial (I)
Junction Temperature Range — -40 C to +100 C
Configuration Method — SRAM, JTAG in-system programmable
Lifecycle — Obsolete - EOL announced by Altera/Intel in 2008

数据手册与资源

浏览全部产品 创建 BOM 获取报价