EP20K200CF484I7 vs EP20K200CF484I9N 对比

详细并排对比 EP20K200CF484I7 出自 Altera 和 EP20K200CF484I9N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K200CF484I7 EP20K200CF484I7 - APEX 20KC 200K Gates FPGA 1.8V FBGA-484 | Altera

EP20K200CF484I7 - APEX 20KC 200K Gates FPGA 1.8V FBGA-484 | Altera

EP20K200CF484I7 ⚠ 最后一次采购

规格对比

参数 EP20K200CF484I7 EP20K200CF484I9N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $89.50 $115.00
Family APEX 20KC APEX 20KC
Logic Elements 8,320 —
Typical Gate Count 200,000 system gates —
Maximum Operating Frequency 375.94 MHz (per device-family data) —
Process Technology 0.15 µm CMOS with copper interconnect 0.15 µm CMOS
Internal Supply Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) —
I/O Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) —
User I/O Pins 376 —
Dedicated Inputs 4 —
封装 484-pin FBGA (FineLine BGA) 484-pin FBGA (PBGA484), 1.0 mm pitch
Package Body Size 23 mm × 23 mm —
Ball Pitch 1.000 mm —
Speed Grade -7 I9 (industrial, highest-performance bin)
Temperature Grade (I7 suffix) Industrial, -40 °C to +85 °C —
Configuration Technology SRAM-based, re-programmable in-system —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Compliant
Propagation Delay [DATA_NEEDED: datasheet-specified tpd] —
Logic Elements / Cells — 8,320
Maximum Gates — 200,000
Maximum Internal Frequency — 250 MHz
Core Supply Voltage — 1.8 V nominal (1.71 V to 1.89 V)
User I/O Count — 376 (368 user I/O + 4 dedicated inputs)
工作温度 — [DATA_NEEDED: industrial temperature range -40C to +85C assumed for I-grade]
Programmable I/O Standards — LVTTL, LVCMOS, PCI
Configuration Interface — JTAG IEEE 1149.1, ByteBlaster/BitBlaster serial
On-chip Memory — Embedded System Blocks (ESBs) for distributed RAM/ROM
Lead-Free (Pb-free) — Yes (N suffix)

数据手册与资源

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