EP20K200EBC356-1 vs EP20K200CB356C8N 对比

详细并排对比 EP20K200EBC356-1 出自 Altera 和 EP20K200CB356C8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200EBC356-1 EP20K200CB356C8N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $142.00 $56.40
Family APEX 20K (APEX 20KE) APEX 20KC
System Gates 200,000 200,000
Logic Elements / Cells 8,320 —
Maximum User I/Os 277 —
Core Voltage 1.8 V (1.71 V to 1.89 V) —
Process Technology 0.22 µm CMOS 0.15 um CMOS
Propagation Delay 2.5 ns —
Internal Performance Up to 367 MHz —
封装 356-ball LBGA (35 x 35 mm) 356-ball LBGA
安装类型 Surface Mount (BGA) —
工作温度 0 °C to 85 °C (Commercial) —
Architecture MultiCore (LUT + product-term + embedded memory) —
On-chip Memory Embedded System Blocks (ESB / SRAM) —
Configuration Method JTAG (ByteBlaster / MasterBlaster), passive serial —
Development Software Altera Quartus II —
RoHS 状态 [DATA_NEEDED: RoHS status not stated in verified sources] [DATA_NEEDED: RoHS compliance]
生命周期状态 Obsolete / EOL —
Series — EP20K200
Device Type — SRAM-based LUT FPGA
Logic Elements (Cells) — 8,320
Maximum Internal Frequency — 301.21 MHz
Propagation Delay (tpd) — 1.78 ns
Nominal Core Supply Voltage — 1.8 V
Core Supply Voltage Range — 1.71 V to 1.89 V
Number of User I/O Pins — 263
Number of Dedicated Inputs — 4
Total Macrocells / Output Functions — 263
Embedded Memory Bits — 106,496 bits
Number of PLLs — 4
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Differential Signaling — LVDS
Configuration Interface — Serial / JTAG (IEEE 1149.1)
Operating Temperature (commercial "C") — 0 C to +85 C (TJ)
Terminal Finish ("N") — Lead-free / Pb-free
湿敏等级(MSL) — [DATA_NEEDED: MSL rating]

数据手册与资源

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