EP20K200EBC356-2 vs EP20K200CB356C8N 对比

详细并排对比 EP20K200EBC356-2 出自 Altera 和 EP20K200CB356C8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200EBC356-2 EP20K200CB356C8N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $99.50 $56.40
Series APEX 20KE EP20K200
Family APEX 20K (APEX 20KE enhancement) APEX 20KC
Typical Gates 200,000 —
Maximum Logic Elements 8320 —
Macros / Logic Cells 832 —
Maximum Flip-Flops 13,824 —
Embedded RAM 53,248 bits —
User I/Os 271 —
Number of Terminals / Pins 356 (LBGA) —
Propagation Delay 2.5 ns —
电源电压 2.5 V (core) —
工作温度 0 C to 85 C (commercial) —
Logic Family CMOS —
Number of PLLs 4 embedded PLLs 4
Number of DDR Interfaces 4 —
Package Type 356-LBGA (EBC suffix) —
安装类型 Surface Mount (BGA) —
Speed Grade -2 —
Compliance RoHS status [DATA_NEEDED: RoHS] —
Device Type — SRAM-based LUT FPGA
System Gates — 200,000
Logic Elements (Cells) — 8,320
Maximum Internal Frequency — 301.21 MHz
Process Technology — 0.15 um CMOS
Propagation Delay (tpd) — 1.78 ns
Nominal Core Supply Voltage — 1.8 V
Core Supply Voltage Range — 1.71 V to 1.89 V
Number of User I/O Pins — 263
Number of Dedicated Inputs — 4
Total Macrocells / Output Functions — 263
Embedded Memory Bits — 106,496 bits
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Differential Signaling — LVDS
Configuration Interface — Serial / JTAG (IEEE 1149.1)
封装 — 356-ball LBGA
Operating Temperature (commercial "C") — 0 C to +85 C (TJ)
Terminal Finish ("N") — Lead-free / Pb-free
RoHS 状态 — [DATA_NEEDED: RoHS compliance]
湿敏等级(MSL) — [DATA_NEEDED: MSL rating]

数据手册与资源

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