EP20K200EFC484-1 vs EP20K200EFC484-2N 对比
详细并排对比 EP20K200EFC484-1 出自 Altera 和 EP20K200EFC484-2N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K200EFC484-1 | EP20K200EFC484-2N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $68.40 | $175.00 |
| Family | APEX 20KE | APEX-20KE |
| Logic Elements / Cells | 8320 | — |
| System Gates | 200000 | 200,000 |
| Embedded Memory (Bits) | 106496 | — |
| Maximum User I/O | 376 | 376 |
| Number of PLLs | 4 | — |
| Core Voltage | 1.8 V | 1.8 V |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| 封装 | 484-BGA (FineLine BGA) | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Package Ball Count | 484 | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 工作温度 | -40 °C to +85 °C (industrial, inferred from grade code) | 0 °C to +85 °C (Commercial) |
| I/O Standard Support | LVDS, PCI, LVTTL, LVCMOS, SSTL, HSTL | — |
| Programming Interface | IEEE 1149.1 JTAG, passive serial, passive parallel | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| MSL 等级 | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Logic Elements | — | 8,320 |
| Total RAM Bits | — | 106,496 |
| Embedded System Blocks (ESB) | — | 52 (True Dual-Port RAM) |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Propagation Delay (typ.) | — | 2.5 ns |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | — | 4 |
| Speed Grade | — | -2 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |