EP20K200EQC208-3 vs EP20K200CF484C8ES 对比

详细并排对比 EP20K200EQC208-3 出自 Intel 和 EP20K200CF484C8ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K200CF484C8ES EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES ⚠ 最后一次采购

规格对比

参数 EP20K200EQC208-3 EP20K200CF484C8ES
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $65.00 $89.00
Family APEX 20KE APEX 20K
Series APEX 20K (enhanced "E" variant) APEX-20KC
Product Type FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable —
System Gates (typical) 200,000 —
Logic Elements (LEs) 8,320 —
Embedded RAM Bits 106,496 —
Maximum User I/O 136 —
Speed Grade -3 C8 (-8 commercial)
Core Supply Voltage (VCCINT) 2.5 V (typical, APEX 20KE generation) —
I/O Supply Voltage (VCCIO) MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible —
封装 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) 484-pin FBGA (FineLine BGA)
Terminal Pitch 0.5 mm —
安装类型 Surface Mount Surface Mount
Technology CMOS, SRAM configuration cell —
Configuration Mode Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) —
Embedded Array Blocks (EABs) Yes (dual-port RAM/ROM, up to 16-bit wide) —
MultiVolt I/O Support Yes —
LVDS Support True-LVDS (enhanced "E" variant feature) —
湿敏等级(MSL) 3 (168 Hours) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Operating Temperature (Commercial) 0 °C to 85 °C —
Logic Elements — 8,320
System Gates — 200,000
Embedded Memory (RAM bits) — 106,496
Number of Logic Array Blocks (LABs) — 104
Number of Embedded System Blocks (ESBs) — 13
User I/O Pins (max) — 376
PLLs — 4
Core Voltage — 1.8 V
工作温度 — 0C to +85C (commercial)
Process Node — 0.18 micron CMOS
Configuration Interface — JTAG (IEEE 1149.1) / Altera serial
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP
Lead Free / RoHS — [DATA_NEEDED: lead-free status]

数据手册与资源

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