EP20K200RC208-3N vs EP20K200RC208-1X 对比

详细并排对比 EP20K200RC208-3N 出自 Altera 和 EP20K200RC208-1X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200RC208-3N EP20K200RC208-1X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $39.00 $35.80
Family APEX-20K APEX-20KE
Series APEX 20K —
Logic Elements 8320 cells 8,320 cells
System Gates 200,000 —
Embedded Memory 106,496 bits —
Maximum Operating Frequency 167 MHz —
User I/O Pins 144 —
Dedicated Inputs 4 —
Process Technology 0.22 um CMOS 0.18 µm CMOS
Core Supply Voltage 2.5 V —
I/O Standard Support LVDS, 1.8V APEX-20KE family —
Package Type 208-RQFP / BFQFP with exposed pad —
Terminal Pitch 0.5 mm —
工作温度范围 0C to +85C (industrial) —
Propagation Delay 3.6 ns —
Architecture MultiCore (LUT + product-term + embedded memory) —
安装类型 Surface Mount Surface Mount (gull-wing leads)
Typical Gate Count — 200,000 gates
Embedded RAM Bits — 106,496 bits
Embedded RAM Blocks (ESBs) — 4 lanes / 52 ESBs
Maximum User I/O Pins — 144 (PQFP-208 variant)
Core Voltage — 1.8 V (±5%)
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+
Speed Grade — -1X (1.8 V core, PQFP-208 pinout)
封装 — 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch
工作温度 — 0 °C to +85 °C (commercial)
Configuration Interface — IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices
MultiCore Architecture — LUT logic + product-term logic + embedded memory
PLL Count — 4 enhanced PLLs (with programmable phase shift)
RoHS 状态 — Compliant (lead-free PQFP package)
Moisture Sensitivity Level — MSL 3 (per JEDEC J-STD-020, applicable to PQFP)

数据手册与资源

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