EP20K400CB652I7 vs EP20K400CB652I8N 对比

详细并排对比 EP20K400CB652I7 出自 Altera 和 EP20K400CB652I8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400CB652I7 EP20K400CB652I8N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $149.50 $115.00
Family APEX 20KC APEX 20KC
Device Family Field-Programmable Gate Array (FPGA) —
Typical Gates 400,000 —
Logic Elements (LEs) 16,640 —
Maximum Operating Frequency 375.94 MHz 301.21 MHz
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.8 V / 3.3 V —
封装 BGA-652 (652-ball) 652-pin BGA
Package Code (JESD-30) S-PBGA-B652 —
Terminal Form Ball —
Package Shape Square —
Maximum User I/O Pins [DATA_NEEDED: max user I/O] —
Embedded Memory Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM —
Configuration Method SRAM + JTAG (ISP) —
Speed Grade 7 8
Temperature Grade Industrial (-40 °C to +100 °C) —
RoHS 状态 Non-compliant (JESD-609 e0, contains lead) unknown
Manufacturer Status Obsolete (Intel/Altera legacy FPGA) —
Logic Elements — 16,640
System Gates — 400,000
Macrocells — 1664
Number of User I/O — 488
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Number of Embedded System Blocks (ESBs) — [DATA_NEEDED: ESB count]
Number of PLLs — 4
Embedded Memory (Max) — [DATA_NEEDED: total embedded memory bits]
Core Voltage — 1.8 V
I/O Voltage (MultiVolt) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Operating Temperature (Industrial) — -40°C to +100°C
安装类型 — Surface Mount
Configuration Interface — JTAG / Passive Serial
Lead-Free — unknown
Design Tool — Altera Quartus II (APEX 20KC support)

数据手册与资源

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