EP20K400FI672-2N vs EP20K400FI672-2X 对比

详细并排对比 EP20K400FI672-2N 出自 Altera 和 EP20K400FI672-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400FI672-2N EP20K400FI672-2X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $188.75 $171.00
Family APEX 20K APEX 20K
Typical Gates 400,000 400,000 system gates
Logic Elements / Cells 16,640 —
Maximum User I/O 488 —
Embedded Memory Bits 212,992 bits —
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count per family datasheet] —
Process Technology 0.22 µm CMOS 0.18 um CMOS, 6-metal
Core Voltage 2.5 V 1.8 V
Maximum Frequency 200 MHz —
封装 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) 672-ball BGA (FI672)
Package Body Size 27 x 27 mm —
Terminal Pitch 1.0 mm —
Propagation Delay 3.1 ns —
Speed Grade -2 -2X
工作温度 Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] -40C to +85C (industrial)
湿敏等级(MSL) 3 —
Peak Reflow Temperature 220 °C —
安装类型 Surface Mount —
RoHS 状态 Compliant (lead-free) [DATA_NEEDED: RoHS compliance]
Configuration Modes PS, PPS, PPA, JTAG —
Supported I/O Standards LVTTL, LVCMOS, SSTL, HSTL —
Logic Elements — 16,640
Embedded Memory — 212,992 bits
User I/O Pins — 496
Package Code — BGA
Terminal Form — Ball
No. of Terminals — 672
Package Shape — Square
I/O Voltage Support — 1.8V / 2.5V / 3.3V / 5V (MultiVolt)
Configuration Method — SRAM (serial EPROM or JTAG)
JTAG Support — Yes (IEEE 1149.1)

数据手册与资源

浏览全部产品 创建 BOM 获取报价