EP20K400GC655-1X vs EP20K400GC655-2N 对比

详细并排对比 EP20K400GC655-1X 出自 Altera 和 EP20K400GC655-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K400GC655-1X EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X Obsolete

规格对比

参数 EP20K400GC655-1X EP20K400GC655-2N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $193.04 $127.50
Product Family Altera APEX 20K —
Device Type Field Programmable Gate Array (FPGA) —
Technology CMOS —
Gate Count 400K gates —
Logic Elements 16640 cells —
Maximum System Frequency 250 MHz —
Propagation Delay 2.5 ns —
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V / 3.3 V —
Number of User I/O 496 —
Number of Dedicated Inputs 6 —
Number of Terminals 655 —
Package Type CPGA-655 (Ceramic Pin Grid Array) —
Package Body Material Ceramic —
Process Technology 0.22 um 0.22 µm CMOS
工作温度范围 [DATA_NEEDED: operating temperature range] —
Embedded RAM Bits [DATA_NEEDED: embedded RAM bits] —
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
Family — APEX 20KC
Number of Logic Elements — 16640
Number of Logic Cells — 16640
Total System Gates — 400000
Total RAM Bits — 212992
Number of I/O — [DATA_NEEDED: I/O count]
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Core Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Voltage (VCCIO) — 2.5 V (LVDS-capable)
Maximum Operating Frequency — 200 MHz
Propagation Delay (Tpd) — 3.1 ns
封装 / 外壳 — 655-BCPGA (Ceramic Pin Grid Array)
Supplier Device Package — 655-CPGA, 62.48 x 62.48 mm
工作温度 — Industrial (per Altera part-number -N suffix)
安装类型 — Through-Hole (CPGA, socket-compatible)
LVDS Support — Yes
Architecture — MultiCore (LUT + product-term + embedded memory)
Configuration Method — JTAG / Passive Serial
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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