EP20K400GC655-2 vs EP20K400GC655-2N 对比

详细并排对比 EP20K400GC655-2 出自 Altera 和 EP20K400GC655-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400GC655-2 EP20K400GC655-2N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $80.00 $127.50
Series APEX-20KC —
Family APEX 20K APEX 20KC
Device Type FPGA (Field Programmable Gate Array) —
System Gates 400,000 —
Logic Cells / Elements 16,640 —
Total RAM Bits 212,992 212992
Maximum Internal Frequency 200 MHz —
Speed Grade -2 —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Core Supply Voltage 2.5 V —
I/O Supply Voltage 1.71 V to 1.89 V (MultiVolt) —
LVDS Support Yes Yes
PLLs 4 —
引脚数量 655 —
Package Type 655-BCPGA (CPGA-655) —
Package Dimensions 62.48 x 62.48 mm —
安装类型 Through-Hole (CPGA) Through-Hole (CPGA, socket-compatible)
工作温度 [DATA_NEEDED: operating temperature range] Industrial (per Altera part-number -N suffix)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Number of Logic Elements — 16640
Number of Logic Cells — 16640
Total System Gates — 400000
Number of I/O — [DATA_NEEDED: I/O count]
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Core Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Voltage (VCCIO) — 2.5 V (LVDS-capable)
Maximum Operating Frequency — 200 MHz
Propagation Delay (Tpd) — 3.1 ns
封装 / 外壳 — 655-BCPGA (Ceramic Pin Grid Array)
Supplier Device Package — 655-CPGA, 62.48 x 62.48 mm
Architecture — MultiCore (LUT + product-term + embedded memory)
Configuration Method — JTAG / Passive Serial
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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