EP20K600CB652C8N vs EP20K600CB652C9 对比

详细并排对比 EP20K600CB652C8N 出自 Altera 和 EP20K600CB652C9 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CB652C8N EP20K600CB652C9
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $115.00 $142.50
Family APEX 20KC APEX 20KC
Device Type Loadable PLD / FPGA —
System Gates 600,000 1,537,000
Logic Elements 24,320 cells —
Embedded Memory 311,296 bits —
User I/O Pins 488 —
Dedicated Inputs 4 —
Outputs 480 —
Propagation Delay (typ.) 1.48 ns 1.48 ns
Pin-to-Pin Timing 1.78 ns —
Internal Frequency (typ.) 301.21 MHz —
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
Process Technology 0.18 µm all-layer copper-metal 0.15 µm all-layer copper CMOS
Speed Grade C8 —
工作温度 0 °C to 85 °C (commercial) 0 °C to 85 °C (commercial)
封装 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch 652-BGA (45 × 45 mm, 1.27 mm pitch)
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Architecture MultiCore LUT + Embedded System Blocks (ESB) —
Pin-Compatible With APEX 20KE family —
RoHS 状态 unknown Compliant (per Altera product page)
Logic Elements / Cells — 24,320
Number of LABs / CLBs — 2,432
Total RAM Bits — 311,296
User I/O — 488
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
电源电压 — 1.71 V to 1.89 V
Internal Datapath Frequency — up to 250 MHz
Configuration — JTAG IEEE 1149.1 / serial / EPC2-compatible
Product Status — Obsolete (per distributor listings)

数据手册与资源

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