EP20K600CF33C9 vs EP20K600CF33C8 对比
详细并排对比 EP20K600CF33C9 出自 Intel 和 EP20K600CF33C8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CF33C9 | EP20K600CF33C8 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $285.75 |
| Family | APEX 20KC | APEX 20KC |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| System Gates | 600,000 (maximum) | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum Operating Frequency | 250 MHz | — |
| 最大时钟频率 | 303.03 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | — |
| User I/O | 588 (4 dedicated inputs + 580 general-purpose I/O) | — |
| 封装 | 1020-ball FC-FBGA | 1020-ball FineLine BGA (FC-FBGA), 33 x 33 mm |
| 安装类型 | Surface Mount (BGA) | — |
| 工作温度范围 | [DATA_NEEDED: operating temperature range] | — |
| Embedded RAM | Dual-port RAM blocks (per family) | — |
| Programmability | JTAG / IEEE 1149.1 ISP, SRAM-based | — |
| RoHS 状态 | [DATA_NEEDED: rohs status] | Compliant (lead-free version) / non-compliant for legacy C-speed grade variant |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| Logic Block Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS (per family datasheet) | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Embedded RAM Bits | — | 311,296 |
| Embedded System Blocks (ESB) | — | 152 |
| Maximum User I/O | — | 488 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (bank-selectable) |
| LVDS Support | — | Yes, up to 840 Mbps |
| PLLs | — | 4 enhanced PLLs |
| Speed Grade | — | -8 |
| 工作温度 | — | Commercial (0 °C to +85 °C) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, Passive Parallel Synchronous, JTAG |
| Status | — | NRND / Last-Time-Buy (per Altera/Intel product notice) |