EP20K600CF672-3 vs EP20K600CF672-1X 对比

详细并排对比 EP20K600CF672-3 出自 Intel 和 EP20K600CF672-1X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672-3 EP20K600CF672-1X
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $99.50 $95.00
Family APEX 20KC —
Typical Gates 600,000 —
Maximum System Gates 2,432,000 —
Maximum Logic Elements 2,432 —
Embedded System Memory 311,040 bits (380 Kbits ESB) —
User I/O Pins 488 —
封装 672-ball FineLine BGA 672-ball BGA (CF672), 1.27 mm pitch
Speed Grade -3 -1 (industrial speed grade, X = lead-free)
Process Technology 0.18 µm CMOS 0.18 um SRAM CMOS
PLLs 4 4
Maximum Internal Frequency 180 MHz (per APEX 20K family datasheet) —
Configuration Modes PS, PPS, PPA, JTAG, EPC2/EPC16 —
I/O Standards Supported LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI —
安装类型 Surface Mount Surface Mount (BGA)
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial temp range]
RoHS 状态 Lead-free / RoHS compliant (per Alibaba listing) Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Device Family — APEX 20KC MultiCore FPGA
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded System Blocks (ESBs) — up to 256
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
Maximum User I/O — [DATA_NEEDED: max user I/O count]
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
电源电压 — [DATA_NEEDED: VCCINT/VCCIO]
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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