EP20K600CF672C-8 vs EP20K600CF672C6 对比

详细并排对比 EP20K600CF672C-8 出自 Altera 和 EP20K600CF672C6 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C-8 EP20K600CF672C6
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $1,150.00 $480.00
Series APEX 20KC —
Device Type FPGA (Field Programmable Gate Array) —
Typical Gates 600,000 —
Logic Elements (LEs) 24,320 24,320
Embedded Memory Bits 311,296 —
Maximum User I/Os 508 —
引脚数 672 —
Package Type 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm) —
Speed Grade -8 -6 (C6)
Propagation Delay (tPD) 1.48 ns —
Process Technology 0.15 micrometer all-layer copper-metal 0.18 µm CMOS, 6 metal layers
Architecture MultiCore (LUT logic + embedded memory) —
工作温度范围 0C to +85C (commercial) —
电源电压 Multi-rail (core + I/O banks) —
Configuration Method Serial / parallel / JTAG SRAM-based, JTAG, EPC16/EPC2
Pin Compatibility Pin-compatible with APEX 20KE family —
RoHS 状态 [DATA_NEEDED: RoHS status] Non-RoHS (legacy process)
Family — APEX 20KC
Typical Gate Count — 600,000 gates
Embedded System Blocks (ESBs) — 160 (each 2,048 bits)
Maximum Embedded RAM — 311,296 bits (311 kbit)
Maximum User I/O Pins — 508
封装 — 672-ball FineLine BGA (CF672)
Package Body Size — 27 mm × 27 mm
工作温度 — 0 °C to +85 °C (commercial)
Core Voltage — 1.8 V
I/O Standards Supported — LVCMOS, LVTTL, HSTL, SSTL, GTL+
Embedded PLLs — 4

数据手册与资源

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