EP20K600CF672C6 vs EP20K600CF672C8N 对比

详细并排对比 EP20K600CF672C6 出自 Altera 和 EP20K600CF672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C6 EP20K600CF672C8N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $480.00 $108.00
Family APEX 20KC APEX 20KC
Typical Gate Count 600,000 gates —
Logic Elements (LEs) 24,320 —
Embedded System Blocks (ESBs) 160 (each 2,048 bits) —
Maximum Embedded RAM 311,296 bits (311 kbit) —
Maximum User I/O Pins 508 —
封装 672-ball FineLine BGA (CF672) BGA-652, 45 x 45 mm, 1.27 mm pitch
Package Body Size 27 mm × 27 mm —
Speed Grade -6 (C6) —
工作温度 0 °C to +85 °C (commercial) 0°C to 85°C
Core Voltage 1.8 V —
I/O Standards Supported LVCMOS, LVTTL, HSTL, SSTL, GTL+ —
Embedded PLLs 4 —
Process Technology 0.18 µm CMOS, 6 metal layers —
Configuration Method SRAM-based, JTAG, EPC16/EPC2 [DATA_NEEDED: configuration memory and programming method]
RoHS 状态 Non-RoHS (legacy process) unknown
Device Type — SPLD
Product Type — FPGA / programmable logic device
Nominal Gate Capacity — 600K gates
Logic Elements or Cells — 24,320
Macros — 2,432
User I/O Count — 508
Package Terminals — 652 pins
Package Description — 672-pin FC-FBGA
电源电压 — 1.8 V
Listed Frequency — 301.21 MHz
Propagation Delay — 1.48 ns
Fabrication Process — 0.15 µm
Interconnect Metal — All-layer copper metal
I/O Configuration — 508 user I/O
安装类型 — Surface mount
REACH Status — unknown
AEC-Q100 Qualification — unknown
Core Current — [DATA_NEEDED: core supply current]
I/O Bank Voltage — [DATA_NEEDED: supported I/O voltage range]
Junction Temperature — [DATA_NEEDED: maximum junction temperature]
热阻 — [DATA_NEEDED: junction-to-ambient thermal resistance]

数据手册与资源

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