EP2A40F1020C7ES vs EP2A40F1020C8 对比

详细并排对比 EP2A40F1020C7ES 出自 Intel 和 EP2A40F1020C8 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F1020C7ES EP2A40F1020C8
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $185.00 $310.00
Family APEX II APEX II
Logic Elements 38,400 —
Typical Gates 1,500,000 —
Embedded Memory 655,360 bits —
Maximum User I/O 735 —
Maximum Frequency 562 MHz —
Process Technology 0.15 µm CMOS, all-layer copper, up to 8 metal layers 0.15 µm all-layer copper, up to 8 metal layers
Core Voltage 1.5 V —
封装 1020-pin FC-FBGA —
Speed Grade C7 (with ES enhanced speed suffix) —
High-Speed Interface 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport —
工作温度 [DATA_NEEDED: commercial/industrial grade] 0 C to +85 C (commercial, 'C' suffix)
I/O Standards LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V —
PLLs Up to 8 (per datasheet family feature) —
RoHS 状态 [DATA_NEEDED] [DATA_NEEDED: confirm per lot]
Programming Interface JTAG (IEEE 1149.1), passive serial —
安装类型 Surface Mount (FC-FBGA) —
Logic Family — CMOS
System Gates — 1,500,000
Logic Cells — 38,400
Macros / Macro Cells — 2,560
Embedded RAM — [DATA_NEEDED: total ESB bits]
Maximum Internal Frequency — 376 MHz
Propagation Delay — 1.55 ns
User I/O Pins — 735
Core Voltage (VCCINT) — 1.5 V
I/O Voltage (VCCIO) — MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V
Package Type — FC-FBGA (FineLine BGA)
Package Pin Count — 1020
Package Dimensions — 33 x 33 mm
Ball Pitch — 1.0 mm
Configuration Interface — JTAG / Altera serial
Design Toolchain — Quartus II (legacy version 4.x or earlier recommended)

数据手册与资源

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