EP2A40F672C9ES vs EP2A40F672C6N 对比
详细并排对比 EP2A40F672C9ES 出自 Altera 和 EP2A40F672C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A40F672C9ES | EP2A40F672C6N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $165.00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | 40,000 |
| System Gates | 1,500,000 | — |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| 封装 | 672-pin FC-FBGA | 672-ball FineLine BGA |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Speed Grade | -9 | C6 (per part number suffix) |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | — |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| 工作温度 | — | Commercial (0C to +85C) |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |