EP2A70B724C7ES vs EP2A70B724C8N 对比
详细并排对比 EP2A70B724C7ES 出自 Altera 和 EP2A70B724C8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A70B724C7ES | EP2A70B724C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,190.00 | $240.00 |
| Family | APEX II | FPGA (PLD) |
| Typical Gates | 3,000,000 (3M) | — |
| Logic Elements (Cells) | 67,200 | — |
| Maximum Operating Frequency | 420 MHz | — |
| Process Technology | 0.15 µm | 0.15 um CMOS, SRAM-based |
| Core Voltage | 1.5 V | — |
| 封装 | 724-pin FCBGA | — |
| User I/O Pins | 540 | — |
| Speed Grade | C7 | — |
| Temperature Grade | Commercial (C) | — |
| 存储器类型 | Embedded System Block (ESB) | — |
| PLLs | Up to 8 | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | — |
| Programming Interface | JTAG / ByteBlaster | — |
| Device Marking Suffix | ES (Engineering Sample) | — |
| Series | — | APEX II (EP2A70) |
| System Gates | — | 3,000,000 (3 M) |
| Logic Elements / Cells | — | 67,200 |
| Macrocells | — | 16 |
| Product Terms | — | 32 |
| Propagation Delay | — | 2.49 ns |
| Maximum Internal Clock Frequency | — | 281 MHz |
| Maximum Clock Frequency (fMAX) | — | 1694.91 MHz |
| Core Supply Voltage | — | 1.5 V |
| Architecture | — | PLA-type / LUT-based |
| Package Type | — | FCBGA-724 (square) |
| Number of Pins / Balls | — | 724 |
| Terminal Pitch | — | 1.270 mm |
| Maximum User I/O | — | 536 |