EP2C35F484I6N vs EP2C35F484C7N 对比

详细并排对比 EP2C35F484I6N 出自 Intel 和 EP2C35F484C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2C35F484I6N EP2C35F484C7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $52.10 $85.20
Logic Elements 33,216 —
Logic Array Blocks (LABs) 2,100 —
Total RAM Bits 483,840 bits (483.84 Kbit on-chip) —
Embedded 18x18 Multipliers 35 (Cyclone II family maximum 150) 35
Phase-Locked Loops (PLLs) 4 —
Maximum User I/O Pins 322 (package-dependent; FBGA-484 supports up to 322 user I/O) —
封装 484-ball FBGA (Fine-Pitch BGA) 484-ball FBGA (FineLine BGA)
Logic Family CMOS —
Core Supply Voltage 1.2 V —
工作温度范围 -40C to +85C (industrial) —
Maximum Internal Clock Frequency 402.5 MHz —
Process Node 90 nm TSMC CMOS —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 Compliant Compliant (lead-free)
Configuration Method Serial / Parallel (via Altera/Intel configuration device or JTAG) —
Family — Cyclone II
Logic Elements (LEs) — 33,216
Total Memory Bits — 483,840 bits
Embedded Memory (M4K blocks) — 105
User I/O Pins — 322
Process Technology — 90 nm CMOS, SRAM-based
Core Voltage (VCCINT) — 1.2 V
I/O Bank Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (per bank)
PLL Count — 4
Global Clock Networks — 16
Maximum User Frequency — 402 MHz (internal logic)
Configuration Modes — JTAG, Active Serial (AS), Passive Serial (PS), PPA
工作温度 — 0C to +85C (commercial, 'C7' suffix)

数据手册与资源

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