EP2S30F672I4 vs EP2S30F672I5 对比
详细并排对比 EP2S30F672I4 出自 Intel 和 EP2S30F672I5 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672I4 | EP2S30F672I5 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $695.00 | $185.00 |
| Series | Stratix II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | 1,368,576 (1.36 Mbit) |
| Number of I/O | 500 | — |
| DSP Blocks | 12 (per datasheet, family range) | 16 (9-bit x 9-bit multipliers) |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| 工作温度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 封装 / 外壳 | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | 1.00 mm |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| RoHS 状态 | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant |
| Family | — | Stratix II |
| Logic Elements (LE) | — | 33,880 |
| Adaptive Logic Modules (ALM) | — | 13,567 (approx., per Stratix II family ratio) |
| Maximum User I/Os | — | 500 (492 outputs reported) |
| Maximum Operating Frequency | — | 609.76 MHz |
| Core Supply Voltage | — | 1.2 V |
| I/O Supply Voltage | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| 封装 | — | 672-ball FC-FBGA (FineLine BGA) |
| Lead-Free | — | Yes |
| Speed Grade | — | 5 (fast) |