EP2S30F672I4N vs EP2S60F67214N 对比
详细并排对比 EP2S30F672I4N 出自 Altera 和 EP2S60F67214N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672I4N | EP2S60F67214N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $145.00 | $232.00 |
| Family | Stratix II | Stratix II |
| Logic Elements (LEs) | 33,880 | — |
| Logic Array Blocks (LABs) | 1,694 | — |
| Total RAM Bits | 1,369,728 | 2,544,192 bit (2.5 Mbit) |
| Maximum User I/Os | 500 | — |
| 封装 | 672-BBGA, FCBGA (27x27 mm) | 672-ball FBGA (FineLine BGA) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40C to +100C (industrial) | -40C to +100C (industrial) |
| Core Supply Voltage | 1.15 V to 1.25 V | — |
| Technology Node | 90 nm | — |
| Speed Grade | I4 (speed grade 4, industrial) | I4 (industrial, fast) |
| 电源电压 | 1.15 V to 1.25 V | — |
| Maximum Frequency | 711.24 MHz | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | 3 (168 hours floor life) |
| RoHS 状态 | Compliant | Lead-free / RoHS compliant |
| Logic Elements | — | 60,440 LE |
| DSP Blocks | — | 12 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Process Technology | — | 90 nm CMOS |
| Core Voltage | — | 1.2 V (typical) |
| I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for FBGA-672] |
| Configuration | — | SRAM-based, configured via bitstream |