EP2S60F484C5 vs EP2S60F484I4 对比

详细并排对比 EP2S60F484C5 出自 Altera 和 EP2S60F484I4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F484C5 EP2S60F484I4
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $491.55 $138.40
Family Stratix II Stratix II FPGA
Logic Elements 60440 —
Configurable Logic Blocks (CLBs) 24176 —
Logic Array Blocks (LABs) 3022 —
Embedded Memory (RAM bits) 2,544,192 —
Maximum User I/O 334 —
封装 484-pin FC-FBGA (FBGA) 484-ball FBGA (F484)
Package Size 23 x 23 mm —
Ball Pitch 1.0 mm [DATA_NEEDED: ball pitch in mm]
Process Technology 90 nm CMOS 90 nm CMOS
Core Voltage (VCCINT) 1.2 V —
Speed Grade C5 (Commercial) I4 (industrial, fastest speed bin for Stratix II F484)
Maximum Internal Frequency 609.76 MHz —
工作温度 Commercial (0C to +85C) —
安装类型 Surface Mount (BGA) Surface Mount
MSL 等级 3 (168 hours) [DATA_NEEDED: MSL rating]
RoHS 状态 Compliant —
Series — Stratix II
Manufacturer — Intel (formerly Altera)
Logic Elements (LE) — 60,440
Adaptive Logic Modules (ALM) — [DATA_NEEDED: ALM count]
Embedded Memory Bits — 2,544,192 bits (~317 KB)
Total RAM Blocks — [DATA_NEEDED: total RAM blocks]
User I/O Pins — 334
User I/O Banks — [DATA_NEEDED: I/O bank count]
High-Speed Transceivers — 12 channels
Transceiver Data Rate — [DATA_NEEDED: max Gbps]
PLLs — 4
DSP Blocks — [DATA_NEEDED: DSP block count]
Core Voltage — 1.2 V
工作温度范围 — -40 °C to +100 °C (Industrial, I4)
Lead-Free / RoHS — Contains Lead; RoHS Non-Compliant (per distributor data)
Configuration Method — SRAM-based, loaded via Quartus II bitstream

数据手册与资源

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