EP2S60F484I4N vs EP2S60F484I5N 对比

详细并排对比 EP2S60F484I4N 出自 Intel 和 EP2S60F484I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F484I4N EP2S60F484I5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $1,195.00 $1,325.00
Series Stratix II Stratix II (EP2S60)
Family Stratix II (EP2S60) Field Programmable Gate Array (FPGA)
Logic Elements (LE) 60,440 60,440
Logic Array Blocks (LABs) 3,022 —
Total RAM Bits 2,544,192 —
Number of I/O 334 —
Number of DSP Blocks 18 (typical) —
Number of PLLs 12 (typical) —
封装 484-BBGA, FCBGA 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch
安装类型 Surface Mount Surface Mount (BGA)
工作温度 -40C to +100C (Industrial, I4) —
Speed Grade -4 (mid) I5 (industrial, slow-speed for low power)
电源电压 1.2 V (core) —
RoHS 状态 Compliant [DATA_NEEDED: rohs status not stated in verified data]
Lead-Free Yes —
Adaptive Logic Modules (ALM) — 24,176
Embedded Memory (bits) — 2,544,192
Embedded Memory (M512/M4K/M-RAM blocks) — M512: 330, M4K: 255, M-RAM: 2
DSP Blocks (18-bit multipliers) — 48 blocks (192 18x18 multipliers)
PLLs — 12 (4 enhanced + 8 fast)
Maximum User I/O Pins — 334
Maximum Fabric Clock — 609.76 MHz
Core Supply Voltage — 1.2 V typical
Process Technology — 90 nm CMOS
工作温度范围 — -40 °C to +100 °C (industrial)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Design Tool — Quartus II (legacy; current Intel Quartus Prime with Stratix II device support)

数据手册与资源

浏览全部产品 创建 BOM 获取报价