EP3C5E144A7N vs EP3C5E144C7 对比
详细并排对比 EP3C5E144A7N 出自 Altera 和 EP3C5E144C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3C5E144A7N | EP3C5E144C7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $22.80 | $19.85 |
| Series | Cyclone III | — |
| Logic Elements (LE) | 5,136 | — |
| Total Memory Bits | 423,936 bits (414 Kbits) | 423,936 |
| Embedded Memory Blocks | 46 x M9K (9 Kbit each) | — |
| Embedded 18x18 Multipliers | 23 | 46 (max) |
| User I/O Pins | 94 | 94 |
| Number of I/O Banks | 4 | — |
| Number of PLLs | 4 | — |
| Core Voltage (VCCINT) | 1.2 V | 1.2 V |
| I/O Bank Voltage (VCCIO) | Per-bank, supports 1.2 V to 3.3 V | — |
| 封装 | 144-LQFP Exposed Pad (EQFP, 22x22 mm) | 144-LQFP Exposed Pad (EQFP-EP), 22x22 mm |
| Speed Grade | 7 | C7 (commercial, 7th speed grade) |
| Temperature Grade | Commercial (0C to +85C junction) | — |
| Process Technology | 65 nm low-k dielectric | 65 nm TSMC low-power |
| Configuration Modes | AS, PS, JTAG, Fast Passive Parallel | JTAG, Active Serial, Passive Serial |
| Design Toolchain | Quartus II / Quartus Prime | — |
| Supported I/O Standards | LVDS, SSTL, LVTTL, PCI, LVCMOS | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Compliant (per DigiKey product page) | Compliant |
| Family | — | Cyclone III |
| Logic Elements (LEs) | — | 5,136 |
| Embedded Memory Blocks (M9K) | — | 46 |
| PLLs | — | 2 (up to 4 outputs each) |
| Global Clock Networks | — | 10 |
| Maximum Internal Frequency | — | 437.5 MHz |
| 工作温度 | — | 0C to +85C (commercial) |
| Configuration Bit Stream Size | — | [DATA_NEEDED: actual size, typically ~1.4 Mbit] |