EP3SE110F1152I2N vs EP3SE110F1152I4 对比

详细并排对比 EP3SE110F1152I2N 出自 Intel 和 EP3SE110F1152I4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE110F1152I2N EP3SE110F1152I4
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $1,480.00 $1,020.00
Series Stratix III Enhanced (EP3SE110) —
Family Stratix III Stratix III E
Logic Elements (LE) 107,500 107,500
Logic Array Blocks (LABs) / CLBs 4,300 —
System Gates 8,936,448 —
User I/O Pins 744 —
Number of Terminals 1,152 —
Package Code BGA (FCBGA) —
Package Shape Square —
Ball Pitch 1.00 mm —
Supply Voltage Range 1.05 V to 1.15 V (nominal 1.1 V) —
Process Technology 40 nm low-power CMOS —
Maximum Internal Clock Frequency 100 MHz (per distributor summary; device supports multi-Gbps transceivers) —
工作温度 -40C to +100C (industrial) -40°C to +100°C (Industrial)
Speed Grade I2 —
Lead-Free / RoHS Yes (suffix N) —
安装类型 Surface Mount Surface Mount (BGA)
Logic Array Blocks (LABs) — 4300
DSP Blocks — 744
Embedded Memory (bits) — 8,936,448
User I/Os — 744
封装 — 1152-ball FCBGA (Flip-Chip BGA)
Process Node — 40 nm
Maximum User I/O Speed — [DATA_NEEDED: maximum I/O toggle rate MHz]
PLLs — 24
Configuration Modes — JTAG, Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS)
Memory Interface Support — DDR3, DDR2, QDRII+, RLDRAM II
Transceiver Protocol Support — PCIe Gen1/Gen2, Gbit Ethernet, XAUI, Serial RapidIO
RoHS 状态 — Compliant
Lead-Free — Yes
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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