EP3SE110F1152I3N vs EP3SE110F1152C3N 对比
详细并排对比 EP3SE110F1152I3N 出自 Altera 和 EP3SE110F1152C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP3SE110F1152I3N - Stratix III E FPGA, 107K LE, 1152-FCBGA | Altera
EP3SE110F1152I3N ⚠ 最后一次采购Intel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ 最后一次采购规格对比
| 参数 | EP3SE110F1152I3N | EP3SE110F1152C3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3,980.00 | $1,560.00 |
| Series | Stratix III E | Stratix III |
| Family | Stratix III E FPGA | Stratix III E |
| Manufacturer | Altera (now Intel PSG) | — |
| Logic Elements (LE) | 107,500 | 107,500 |
| Total RAM Bits | 8,936,448 | 8,936,448 |
| Maximum User I/Os | 744 | — |
| Logic Array Blocks (LABs) | 4300 | 4,300 |
| Number of I/O Banks | Modular I/O banks (see Stratix III Device Handbook) | — |
| Core Voltage | 1.1 V | — |
| Process Technology | 65 nm CMOS | 65 nm TSMC |
| 工作温度范围 | -40C to +100C (industrial, I3 grade) | — |
| Speed Grade | -3 (I3 fast grade, industrial) | C3 |
| 封装 | 1152-ball FC-FBGA (Flip-Chip Fine-pitch BGA) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Lead-free (N suffix); RoHS compliance status: see Stratix III Device Handbook | — |
| Configuration | JTAG via Quartus II; supports AS, PS, JTAG, FPP modes | — |
| Internal Supply Voltage (Max) | 0.94 V (per Partstack listing) | — |
| User I/Os | — | 744 |
| Operating Frequency (max) | — | 500 MHz |
| Core Supply Voltage | — | 1.1 V nominal |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply range] |
| Package Type | — | FC-FBGA-1152 (flip-chip BGA) |
| 工作温度 | — | 0 °C to 85 °C (commercial) |
| 安装方式 | — | SMD/SMT (Tray) |
| DSP Blocks | — | Yes (embedded multipliers) |
| 存储器类型 | — | M9K and M144K block RAM |
| External Memory Support | — | DDR/DDR2/DDR3 with read/write leveling |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | Yes (per Altera/Intel datasheet family convention) |