EP3SE260F1517I4LN vs EP3SL200F1517I4LN 对比
详细并排对比 EP3SE260F1517I4LN 出自 Intel 和 EP3SL200F1517I4LN 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SE260F1517I4LN | EP3SL200F1517I4LN |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,895.00 | $6,300.00 |
| Logic Elements | 255,000 | 200,000 |
| Embedded Memory Bits | 16,672,768 bits (~2,044 KBytes) | 10,901,504 |
| Logic Array Blocks (LABs) | 10,200 | 8,000 |
| User I/O Count | 976 | — |
| 封装 | 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch) | 1517-BBGA, FCBGA |
| Process Technology | 40 nm CMOS | 65 nm TSMC low-power |
| Family | Stratix III E (Enhanced) | Stratix III L |
| Speed Grade | I4 (industrial, 4th tier) | — |
| Power Option | L (low-power) | — |
| 工作温度 | -40C to +100C (case, industrial) | -40C to +100C (Industrial) |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Transceivers | Stratix III E family supports up to 24 transceivers up to 8.5 Gbps | — |
| DSP Blocks (18x18 multipliers) | Up to 384 (family-level, device-specific count not in provided data) | 384 |
| Partial Reconfiguration | Supported | — |
| Memory Interface Support | DDR3, DDR2, QDR II+ (hardened PHY) | — |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| User I/O Pins | — | 976 |
| 安装类型 | — | Surface Mount (BGA) |
| RoHS 状态 | — | Compliant |
| Lead-Free | — | Yes |
| MSL 等级 | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| Supply Voltage Core | — | [DATA_NEEDED: VCC core voltage] |
| Transceiver Data Rate (max) | — | [DATA_NEEDED: max transceiver rate] |
| DSP Performance | — | 288 GMACS |
| Configuration Method | — | Passive Parallel / Active Serial / JTAG |
| Ball Pitch | — | 1.0 mm |
| Package Dimensions | — | 40 mm x 40 mm |