EP3SE260H780C2 vs EP3SE260H780C3N 对比

详细并排对比 EP3SE260H780C2 出自 Altera 和 EP3SE260H780C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP3SE260H780C2 EP3SE260H780C2 - Stratix III E 260K LE FPGA | Altera | 780-BGA

EP3SE260H780C2 - Stratix III E 260K LE FPGA | Altera | 780-BGA

EP3SE260H780C2 ⚠ 最后一次采购

规格对比

参数 EP3SE260H780C2 EP3SE260H780C3N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 有效
库存状态 有库存 有库存
单价(USD) $2,150.00 $1,325.00
Family Stratix® III E —
Series Stratix III Stratix® III E
Logic Elements (LE) 255,000 255,000
Adaptive Logic Modules (ALM) 102,000 —
Embedded Memory (bits) 16,672,768 16,672,768
User I/Os 488 488
Number of LABs/CLBs 10,200 10,200
Process Node 65 nm —
Core Voltage 0.86 V to 1.15 V —
封装 780-BBGA, FCBGA 780-BBGA, FCBGA (H780)
安装类型 Surface Mount Surface Mount
工作温度 0C to +85C (Commercial) 0 °C to +85 °C (C grade, commercial)
RoHS 状态 Compliant Compliant (lead-free 'N' suffix)
Lead Free Yes —
MSL 等级 3 (per JEDEC J-STD-020) —
Number of Pins / Balls — 780
Process Technology — 40 nm CMOS
Maximum Core Frequency — [DATA_NEEDED: maximum core frequency MHz]
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT nominal V]
Transceivers — [DATA_NEEDED: number of embedded transceivers and max data rate]
DSP Blocks — [DATA_NEEDED: number of DSP blocks and precision]
湿敏等级(MSL) — [DATA_NEEDED: MSL level per JEDEC J-STD-020]
Configuration Method — SRAM-based, configured via JTAG / passive / active serial / fast passive parallel
Design Toolchain — Altera Quartus II (legacy); Intel Quartus Prime

数据手册与资源

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