EP3SE50F780C4N vs EP3SE50F780C4LG 对比

详细并排对比 EP3SE50F780C4N 出自 Intel 和 EP3SE50F780C4LG 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE50F780C4N EP3SE50F780C4LG
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $1,430.00 $289.50
Family Stratix III E Stratix III E (Enhanced)
Logic Elements (LE) 47,500 —
Embedded Memory Bits 5,760,000 —
Embedded Memory (M9K/M144K blocks) 488 (per family datasheet) —
Number of LABs 1900 —
Maximum User I/Os 488 —
DSP Blocks (18x18 multipliers) 432 [DATA_NEEDED: DSP block count]
PLLs 12 (per family datasheet) —
Maximum Operating Frequency 717 MHz —
Transceiver Channels Up to 12 (per family, model-dependent) —
Transceiver Data Rate Up to 6.375 Gbps (per Stratix III E family) —
Process Node 40 nm —
封装 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch 780-BBGA, FCBGA (FBGA-780, 1.0 mm pitch)
安装类型 Surface Mount (BGA) Surface Mount (SMT)
电源电压 Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) —
工作温度 0C to +85C (C4 commercial grade) —
Configuration Modes JTAG, Passive Serial, Fast Passive Parallel —
RoHS 状态 Lead-free / RoHS compliant —
MSL 等级 3 (per JEDEC J-STD-020, FBGA package) —
Hard Memory Controller DDR2/DDR3 SDRAM (per Stratix III E family) —
Logic Elements — 47,500 LE
Adaptive Logic Modules (ALMs) — 19,000 ALM
Embedded Memory — 5.49 Mbit
User I/Os — 488 I/O
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Transceivers — [DATA_NEEDED: transceiver count and rate]
Process Technology — 40 nm TSMC low-power CMOS
Speed Grade — -4 (fastest commercial)
Operating Temperature (Commercial) — 0 C to +85 C
Core Voltage (VCCINT) — 0.9 V / 1.0 V / 1.1 V (programmable)
工作电源电压 — 1.1 V (logic core nominal)
Lead-Free Status — Pb-free (LG suffix)
湿敏等级(MSL) — MSL 3 (per JEDEC J-STD-020)
RoHS Compliance — Compliant

数据手册与资源

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