EP3SL200H780I4LN vs EP3SL200H780C3N 对比

详细并排对比 EP3SL200H780I4LN 出自 Altera 和 EP3SL200H780C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL200H780I4LN EP3SL200H780C3N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $1,280.00 $4,995.00
Series Stratix III L —
Family Stratix III L (Low-Power) Stratix III L (low-power)
Manufacturer Intel / Altera (now Intel PSG) —
Number of Logic Elements / Cells 200,000 —
Number of LABs / CLBs 8,000 —
Total RAM Bits 10,901,504 (approximately 10.9 Mbit) —
Number of I/O 488 —
Voltage - Supply 0.9 V core (selectable Vcore) —
工作温度 -40C to +100C (industrial) 0C to +85C (commercial)
安装类型 Surface Mount Surface Mount
封装 / 外壳 780-BBGA, FCBGA (Flip-Chip BGA) —
Process Technology 65 nm CMOS —
Speed Grade I4 (Industrial, mid-speed grade) C3 (commercial, -3 speed)
RoHS 状态 RoHS Compliant (lead-free) —
MSL 等级 MSL 3 (168 Hours, per JEDEC J-STD-020) 3
Roaming Pin Name Suffix LN = lead-free, industrial temp, H780 780-ball package —
Process Node — 40 nm
Logic Elements — 200,000
Embedded Memory Bits — 10,901,504 bits
Logic Array Blocks (LABs) — 8,000
User I/Os — 488
封装 — 780-Ball FCBGA (HBGA), 29 x 29 mm
Maximum Internal Clock Frequency — 800 MHz
Transceivers — 24 channels, up to 3.75 Gbps
DSP Blocks — 384
Voltage - Core — 0.9 V / 1.0 V (core, VCC)
Voltage - I/O — 1.2 V to 3.3 V (VCCIO banks)
Lead-Free / RoHS — Yes
Mounting Pitch — 1.0 mm ball pitch
PLLs — 12 (Stratix III PLL array)
Configuration — JTAG IEEE Std 1149.1, passive/active serial

数据手册与资源

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