EP910LC-30 vs EP910JC-30 对比
详细并排对比 EP910LC-30 出自 Altera 和 EP910JC-30 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LC-30 | EP910JC-30 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $22.50 | $9.75 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocell Count | 24 | — |
| Propagation Delay (tPD) | 30 ns (max) | — |
| Maximum Toggle Frequency | 62 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL) | — |
| Process Technology | CMOS (EPROM-based) | — |
| Package Type | PDIP-40 (Plastic DIP, through-hole) | — |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| I/O Pin Count | 24 | — |
| Dedicated Input Pins | 36 (including I/O) | — |
| Product Terms per Macrocell | Up to 16 | — |
| Programming Technology | UV-erasable EPROM cell | — |
| Development Tool | Altera MAX+PLUS II | — |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Family | — | Classic EPLD (MAX-style) |
| Propagation Delay (tpd) | — | 30 ns |
| Maximum Internal Frequency (Fmax) | — | 33.3 MHz |
| Macrocells | — | 24 |
| Inputs | — | 36 |
| Product Terms | — | 240 |
| Outputs | — | 10 dedicated |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | CMOS EPROM, UV-erasable |
| 封装 | — | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) |
| 工作温度 | — | [DATA_NEEDED: operating temperature range] |
| Supply Current (Icc) | — | [DATA_NEEDED: Icc typical / maximum] |
| 安装类型 | — | Surface Mount (socket-mountable) |
| Logic Blocks | — | 24 macrocells (AND/OR array architecture) |