EP910LC-30T vs EP910LC-30Y 对比
详细并排对比 EP910LC-30T 出自 Altera 和 EP910LC-30Y 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LC-30T | EP910LC-30Y |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价(USD) | $7.10 | $25.40 |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP | — |
| User I/O Pins | 36 | — |
| 封装 | 44-pin PLCC (J-lead) | PLCC-44 |
| 安装类型 | Surface Mount | Surface Mount (PLCC socket) |
| 工作温度 | [DATA_NEEDED: operating temperature] | Commercial 0C to +70C |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Lead-Free | unknown | — |
| Family | — | Altera Classic EPLD |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| 电源电压 | — | 5 V (TTL-compatible) |
| Process Technology | — | CMOS, UV-erasable / OTP |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |