EP910LC44-30T vs EP910LC44 对比

详细并排对比 EP910LC44-30T 出自 Altera 和 EP910LC44 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC44-30T EP910LC44
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $9.75 $8.95
Device Family Classic EPLD —
Logic Type PAL-type CMOS EPLD (OT PLD) —
Macrocells 24 24
Product Terms 240 —
Propagation Delay (tPD) 33 ns —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) 4.75 V to 5.25 V (5 V nominal)
Dedicated Inputs 12 12
I/O Lines 24 (bidirectional) —
Total Inputs 36 —
Total Outputs 24 —
External Clock Inputs 2 —
Programming Technology CMOS, UV-erasable (windowed package in family) —
Security Bit Programmable (logic readback protection) —
Operating Temperature Grade Commercial —
封装 PQCC-44 (Plastic Leaded Chip Carrier, J-bend) 44-pin PLCC (J-leaded)
Terminal Form J-BEND —
Package Code QCCJ —
安装类型 Surface Mount —
Product Family — Classic EPLD (EP910 Series)
Manufacturer — Altera Corporation (now Intel PSG)
Device Type — Erasable Programmable Logic Device (EPLD)
Total Product Terms — 240
I/O Pins — 24
Total Input Pins — 36 (12 dedicated + 24 I/O as inputs)
Global Clock Inputs — 2
Propagation Delay (LC grade) — [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data]
Propagation Delay (LC-30 grade) — 33 ns (per EP910LC44-30 verified data)
Process Technology — CMOS
工作温度 — [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data]
Programming Method — EPROM (erasable UV for ceramic; OTP for plastic PLCC)
Architecture — AND-OR sum-of-products with programmable macrocell feedback
Logic Compatibility — TTL-compatible CMOS I/O
RoHS 状态 — [DATA_NEEDED: not stated in verified data]

数据手册与资源

浏览全部产品 创建 BOM 获取报价