EP910LC44-40 vs EP910LC44-35 对比
详细并排对比 EP910LC44-40 出自 Altera 和 EP910LC44-35 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LC44-40 | EP910LC44-35 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $19.95 |
| Family | Altera Classic EPLD | Classic EPLD (OT sub-family) |
| Macrocells | 24 | 24 |
| Product Terms (Total) | 240 | — |
| I/O Pins | 24 (bidirectional) | 24 |
| Dedicated Inputs | 12 | — |
| Total Inputs | 36 | 36 |
| Global Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 35 ns (max) |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM | — |
| Logic Compatibility | TTL-compatible I/O | — |
| 封装 | 44-pin PLCC (Plastic Leaded Chip Carrier) | 44-pin PLCC (J-leaded) |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | JEDEC file via LP6/MP9 or compatible programmer | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | — |
| Architecture | — | PAL-type AND/OR array |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Global Clocks | — | 2 |
| Process Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed ceramic) |