EP910LI-15 vs EP910LI-50 对比
详细并排对比 EP910LI-15 出自 Altera 和 EP910LI-50 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LI-15 | EP910LI-50 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.70 | $65.00 |
| Product Type | Programmable Logic Device (PLD) | — |
| Device Family | Altera Classic EPLD | — |
| Part Number | EP910LI-15 | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Dedicated Inputs | 12 | — |
| Input/Output Lines | 24 | — |
| Total User-Signal Resources | 36 | — |
| Speed Grade | 15 ns | — |
| 工作温度范围 | -40 °C to +85 °C | — |
| Technology | CMOS | CMOS, UV-erasable EPROM |
| 封装 | 44-terminal J-lead ceramic chip carrier (PQCC44) | — |
| Package Pin Count | 44 terminals | 40 |
| Package Mounting | Surface Mount | — |
| Dielectric/Construction | Ceramic | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Status | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Conflict Minerals Status | unknown | — |
| Family | — | Altera Classic EPLD |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 50 ns |
| Package Type | — | CERDIP-40 (L) |
| Supply Voltage (VCC) | — | 5 V +/- 10% |
| 工作温度 | — | -40C to +85C (industrial) |
| Logic Blocks | — | Classic AND/OR array architecture |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Programming Method | — | EPROM programmer (UV-erasable window) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Speed Grade Suffix | — | -50 (50 ns tPD) |