EP910LI-35 vs EP910JC-30 对比
详细并排对比 EP910LI-35 出自 Altera 和 EP910JC-30 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910LI-35 | EP910JC-30 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $25.80 | $9.75 |
| Family | Altera Classic EPLD | Classic EPLD (MAX-style) |
| Device Series | EP910 | — |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | — |
| Propagation Delay (t_PD) | 35 ns | — |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | — |
| 电源电压 | 5 V (4.75 V to 5.25 V) | — |
| 工作温度 | -40 °C to +85 °C (Industrial) | [DATA_NEEDED: operating temperature range] |
| 封装 | 44-pin PLCC (J-lead) | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) |
| Process Technology | CMOS EPROM | — |
| Programming Technology | EPROM (UV-erasable) | — |
| Erase/Program Cycles | ≥100 | — |
| 安装类型 | Surface Mount | Surface Mount (socket-mountable) |
| Lead Pitch | 1.27 mm | — |
| Propagation Delay (tpd) | — | 30 ns |
| Maximum Internal Frequency (Fmax) | — | 33.3 MHz |
| Inputs | — | 36 |
| Product Terms | — | 240 |
| Outputs | — | 10 dedicated |
| Supply Voltage (Vcc) | — | 5 V |
| Technology | — | CMOS EPROM, UV-erasable |
| Supply Current (Icc) | — | [DATA_NEEDED: Icc typical / maximum] |
| RoHS 状态 | — | [DATA_NEEDED: RoHS compliance] |
| Logic Blocks | — | 24 macrocells (AND/OR array architecture) |