EP910LI44 vs EP910LC44-35 对比

详细并排对比 EP910LI44 出自 Altera 和 EP910LC44-35 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LI44 EP910LC44-35
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.20 $19.95
Family Classic EPLD Classic EPLD (OT sub-family)
Architecture PAL-type, CMOS, One-Time-Programmable PAL-type AND/OR array
Macrocells 24 24
Package Type PLCC-44 (J-lead, surface mount) —
Total Pins 44 —
Dedicated Inputs 12 —
Bidirectional I/O 24 —
Maximum Logic Inputs 36 —
Maximum Outputs 24 —
Flip-Flops 24 —
External Clocks 2 —
Maximum Propagation Delay [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns] —
Supply Voltage (VCC) 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial) 5 V (single supply)
Operating Temperature (L grade) -40 °C to +85 °C (industrial) —
Technology CMOS —
Programmability UV-erasable (windowed) or OTP UV-erasable (windowed ceramic)
RoHS 状态 non-compliant (original PLCC-44 lead finish) —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
Programming Method Altera Logic Programmer card / Data I/O / third-party EPROM programmers —
Usable Gates — 450
Propagation Delay (tPD) — 35 ns (max)
Maximum Frequency (fMAX) — 28.6 MHz
Total Inputs — 36
I/O Pins — 24
Global Clocks — 2
工作温度 — 0C to +70C (commercial)
封装 — 44-pin PLCC (J-leaded)
Process Technology — CMOS

数据手册与资源

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