EP910PC-0 vs EP910PC-20 对比
详细并排对比 EP910PC-0 出自 Altera 和 EP910PC-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910PC-0 | EP910PC-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.70 | $12.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Altera Classic EPLD |
| Usable Gates | 900 gates | 900 |
| Macrocells | 24 | — |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| 封装 | PDIP-40 (Plastic DIP, 40-pin) | PDIP-24 (PC suffix) |
| Speed Grade | -0 (slowest) | — |
| 电源电压 | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | UV-erasable / OTP | EPROM programmer, JEDEC fuse map |
| 安装类型 | Through-Hole (DIP) | Through-Hole (DIP) |
| Device | — | EP910 |
| Macrocell Count | — | [DATA_NEEDED: macrocell count] |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| 引脚数量 | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM (UV-erasable) |
| I/O Compatibility | — | 100% TTL |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |