EP910PC-0 vs EP910PC-20 Comparison
Detailed side-by-side comparison of EP910PC-0 by Altera and EP910PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-0 | EP910PC-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.70 | $12.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Classic EPLD | Altera Classic EPLD |
| Usable Gates | 900 gates | 900 |
| Macrocells | 24 | β |
| Logic Blocks | 6 (4 macrocells each) | β |
| Dedicated Inputs | 10 | β |
| I/O Pins | 24 | β |
| Package | PDIP-40 (Plastic DIP, 40-pin) | PDIP-24 (PC suffix) |
| Speed Grade | -0 (slowest) | β |
| Supply Voltage | 5 V (single supply) | β |
| Process Technology | CMOS | β |
| Logic Compatibility | 100% TTL emulation | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | UV-erasable / OTP | EPROM programmer, JEDEC fuse map |
| Mounting Type | Through-Hole (DIP) | Through-Hole (DIP) |
| Device | β | EP910 |
| Macrocell Count | β | [DATA_NEEDED: macrocell count] |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Pin Count | β | 24 |
| Supply Voltage (VCC) | β | 5 V |
| Technology | β | CMOS EPROM (UV-erasable) |
| I/O Compatibility | β | 100% TTL |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |