EPC16QC-100T vs EPC16C100T 对比

详细并排对比 EPC16QC-100T 出自 Altera 和 EPC16C100T 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16QC-100T EPC16C100T
品牌 Altera Intel
分类 Memory ICs FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $14.50 $16.20
存储器类型 Flash Configuration PROM (in-system programmable) —
Memory Density 16 Mbit (2 Mbyte) —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K —
Configuration Data Width 8-bit or 16-bit (cascaded dual-device mode) —
Configuration Modes Serial (single device), Parallel (two cascaded devices) —
Data Compression Support Yes (35% to 55% bitstream reduction typical) —
JTAG / Boundary Scan IEEE 1149.1 compliant, in-system programmable —
电源电压 3.3 V —
封装 100-pin PQFP (20 x 14 mm), 0.65 mm pitch 100-pin PQFP
工作温度 [DATA_NEEDED: Operating temperature range] -40C to +85C (industrial)
Cascade Interface nCE / nOE handshake for multi-device chains —
Programming Interface JTAG (IEEE 1149.1) and serial —
Endurance [DATA_NEEDED: Program/erase cycle rating] —
Data Retention [DATA_NEEDED: Data retention specification] —
RoHS 状态 unknown —
Lead-Free unknown —
MSL 等级 [DATA_NEEDED: Moisture sensitivity level] —
安装类型 Surface Mount Surface Mount
存储容量 — 16 Mb
Device Type — Enhanced Configuration Device
Supported FPGAs — Stratix, Cyclone, APEX, Mercury (LUT-based)
Configuration Schemes — PS, PPS, FPP, PPA, JTAG
接口 — Serial / Parallel / JTAG (IEEE 1149.1)
Core Voltage — 3.3 V
I/O Voltage — 1.8 V to 3.3 V
Programmability — In-system via JTAG
Lead Pitch — 0.65 mm
Compression Support — Yes (Stratix / Stratix II)
Multi-Device Configuration — Yes (daisy chain)
Remote Update — Yes

数据手册与资源

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